I3C Constants

This page aggregates all I3C-related constants used by functions and methods from the C and C++ APIs.

I3C_BROADCAST_ADDRESS: Hex.: 0x7E, Dec.: 126. The I3C Broadcast Address is a reserved address used for specific control and management \ operations on the I3C bus,

group I3C-related constants

Enums

enum I3cPushPullRate

This enum represents the available Push-Pull transfer rates and duty cycles for I3C SDR communication.

Values:

enumerator PUSH_PULL_2_5_MHz_DC_10: 2.5 MHz with 10% duty cycle

enumerator PUSH_PULL_2_5_MHz_DC_15: 2.5 MHz with 15% duty cycle

enumerator PUSH_PULL_2_5_MHz_DC_20: 2.5 MHz with 20% duty cycle

enumerator PUSH_PULL_2_5_MHz_DC_25: 2.5 MHz with 25% duty cycle

enumerator PUSH_PULL_3_125_MHz_DC_12_5: 3.125 MHz with 12.5% duty cycle

enumerator PUSH_PULL_3_125_MHz_DC_18_75: 3.125 MHz with 18.75% duty cycle

enumerator PUSH_PULL_3_125_MHz_DC_25: 3.125 MHz with 25% duty cycle

enumerator PUSH_PULL_3_125_MHz_DC_31_25: 3.125 MHz with 31.25% duty cycle

enumerator PUSH_PULL_5_MHz_DC_20: 5 MHz with 20% duty cycle

enumerator PUSH_PULL_5_MHz_DC_30: 5 MHz with 30% duty cycle

enumerator PUSH_PULL_5_MHz_DC_40: 5 MHz with 40% duty cycle

enumerator PUSH_PULL_5_MHz_DC_50: 5 MHz with 50% duty cycle

enumerator PUSH_PULL_6_25_MHz_DC_25: 6.25 MHz with 25% duty cycle

enumerator PUSH_PULL_6_25_MHz_DC_37_5: 6.25 MHz with 37.5% duty cycle

enumerator PUSH_PULL_6_25_MHz_DC_50: 6.25 MHz with 50% duty cycle

enumerator PUSH_PULL_7_5_MHz_DC_30: 7.5 MHz with 30% duty cycle

enumerator PUSH_PULL_7_5_MHz_DC_45: 7.5 MHz with 45% duty cycle

enumerator PUSH_PULL_10_MHz_DC_40: 10 MHz with 40% duty cycle

enumerator PUSH_PULL_12_5_MHz_DC_50: 12.5 MHz with 50% duty cycle

enum I3cOpenDrainTransferRate

This enum represents the available Open-Drain transfer rates for I3C communication.

Values:

enumerator OPEN_DRAIN_100_KHz: 100 kHz open-drain transfer rate

enumerator OPEN_DRAIN_400_KHz: 400 kHz open-drain transfer rate

enumerator OPEN_DRAIN_1_MHz: 1 MHz open-drain transfer rate

enumerator OPEN_DRAIN_2_MHz: 2 MHz open-drain transfer rate

enumerator OPEN_DRAIN_4_17_MHz: 4.17 MHz open-drain transfer rate

enum I2cTransferRate

This enum represents the available legacy I2C transfer modes.

Values:

enumerator STANDARD_MODE: Standard mode (100 kHz)

enumerator FAST_MODE: Fast mode (400 kHz)

enumerator FAST_MODE_PLUS: Fast mode Plus (1 MHz)

enumerator HIGH_SPEED_MODE: High-speed mode (3.4 MHz)

enumerator ULTRA_FAST_MODE: Ultra-fast mode (5 MHz)

enum I3cDriveStrength

This enum represents the drive strength configuration for the I3C bus.

Values:

enumerator STANDARD: Standard drive strength (default configuration)

enumerator FAST: Increased drive strength for higher speed or heavier bus loads

enum I3cTransferMode

This enum represents the supported I3C transfer modes.

Values:

enumerator SDR: Standard Data Rate mode (default I3C mode)

enumerator HDR_DDR: High Data Rate Double Data Rate mode

enumerator I2C: Legacy I2C-compatible mode

enum I3cTransferDirection

This enum represents the transfer direction.

Values:

enumerator WRITE: Write transfer (controller to target)

enumerator READ: Read transfer (target to controller)

enum I3cTransferFlags

This enum represents optional flags that modify the behavior of an I3C transfer.

Values:

enumerator I3C_XFER_NONE: Standard transfer: START + Target Address + … + STOP

enumerator I3C_XFER_NONSTOP: No STOP condition is emitted at the end of the transfer

enumerator I3C_XFER_START_WITH_7E: Transfer starts with broadcast address 0x7E before addressing the target

enum I3cTargetResetDefByte

This enum represents the defining byte values for the RSTACT CCC.

Values:

enumerator NO_RESET: No reset action

enumerator RESET_I3C_PERIPHERAL: Reset only the I3C peripheral logic

enumerator RESET_WHOLE_TARGET: Reset the entire target device

enumerator RESET_DEBUG_NETWORK: Reset the debug network

enumerator VIRTUAL_TARGET_DETECT: Trigger virtual target detection

enumerator RETURN_TIME_RESET_PERIPHERAL: Return reset time for I3C peripheral reset

enumerator RETURN_TIME_RESET_WHOLE_TARGET: Return reset time for full target reset

enumerator RETURN_TIME_DEBUG_NETWORK_RESET: Return reset time for debug network reset

enumerator RETURN_VIRTUAL_TARGET_INDICATION: Return virtual target indication

enum I3CEvent

This enum represents the Target Event bits used with the methods for the ENEC and DISEC CCCs.

Values:

enumerator IBI: In-Band Interrupt

enumerator CR: Controller Role Request

enumerator HJ: Hot-Join Request

enum I3cCccType

This enum represents the type of CCC based on the presence of a defining byte.

Values:

enumerator CCC_WITHOUT_DEFINING_BYTE: CCC without defining byte

enumerator CCC_WITH_DEFINING_BYTE: CCC including a defining byte

enum I3cPattern

This enum represents the supported I3C bus patterns.

Values:

enumerator I3C_TARGET_RESET_PATTERN: Target Reset Pattern

enumerator I3C_HDR_EXIT_PATTERN: HDR Exit Pattern

enum CCC

Common Command Codes (CCC) defined by the MIPI I3C v1.2 specification.

This table includes Broadcast CCCs (B_*, 0x00-0x7F) and Direct CCCs (D_*, 0x80-0xFF). For paired commands, the Direct opcode is typically the Broadcast opcode + 0x80.

Values:

enumerator B_ENEC: Broadcast ENEC: Enable events on all targets.

enumerator B_DISEC: Broadcast DISEC: Disable events on all targets.

enumerator B_ENTAS0: Broadcast ENTAS0: Enter Activity State 0.

enumerator B_ENTAS1: Broadcast ENTAS1: Enter Activity State 1.

enumerator B_ENTAS2: Broadcast ENTAS2: Enter Activity State 2.

enumerator B_ENTAS3: Broadcast ENTAS3: Enter Activity State 3.

enumerator B_RSTDAA: Broadcast RSTDAA: Reset dynamic addresses.

enumerator B_ENTDAA: Broadcast ENTDAA: Enter Dynamic Address Assignment.

enumerator B_DEFTGTS: Broadcast DEFTGTS: Define list of targets.

enumerator B_SETMWL: Broadcast SETMWL: Set Maximum Write Length.

enumerator B_SETMRL: Broadcast SETMRL: Set Maximum Read Length.

enumerator B_ENTTM: Broadcast ENTTM: Enter test mode.

enumerator B_SETBUSCON: Broadcast SETBUSCON: Set bus context.

enumerator MIPI_RS_0D: 0x0D – 0x11 - MIPI Reserved

enumerator MIPI_RS_0E

enumerator MIPI_RS_0F

enumerator MIPI_RS_10

enumerator MIPI_RS_11

enumerator B_ENDXFER: Broadcast ENDXFER: End an ongoing transfer.

enumerator MIPI_RS_13: 0x13 – 0x1E - MIPI Reserved

enumerator MIPI_RS_14

enumerator MIPI_RS_15

enumerator MIPI_RS_16

enumerator MIPI_RS_17

enumerator MIPI_RS_18

enumerator MIPI_RS_19

enumerator MIPI_RS_1A

enumerator MIPI_RS_1B

enumerator MIPI_RS_1C

enumerator MIPI_RS_1D

enumerator MIPI_RS_1E

enumerator RES_1F: 0x1F Reserved

enumerator B_ENTHDR0: Broadcast ENTHDR0: Enter HDR mode 0.

enumerator B_ENTHDR1: Broadcast ENTHDR1: Enter HDR mode 1.

enumerator B_ENTHDR2: Broadcast ENTHDR2: Enter HDR mode 2.

enumerator B_ENTHDR3: Broadcast ENTHDR3: Enter HDR mode 3.

enumerator B_ENTHDR4: Broadcast ENTHDR4: Enter HDR mode 4.

enumerator B_ENTHDR5: Broadcast ENTHDR5: Enter HDR mode 5.

enumerator B_ENTHDR6: Broadcast ENTHDR6: Enter HDR mode 6.

enumerator B_ENTHDR7: Broadcast ENTHDR7: Enter HDR mode 7.

enumerator B_SETXTIME: Broadcast SETXTIME: Set exchange timing information.

enumerator B_SETAASA: Broadcast SETAASA: Assign dynamic addresses from static addresses.

enumerator B_RSTACT: Broadcast RSTACT: Configure target reset action.

enumerator B_DEFGRPA: Broadcast DEFGRPA: Define group address assignments.

enumerator B_RSTGRPA: Broadcast RSTGRPA: Reset group address assignments.

enumerator B_MLANE: Broadcast MLANE: Configure multi-lane operation.

enumerator MIPI_WG_2E: 0x2E – 0x48 - MIPI I3C WG Reserved

enumerator MIPI_WG_2F

enumerator MIPI_WG_30

enumerator MIPI_WG_31

enumerator MIPI_WG_32

enumerator MIPI_WG_33

enumerator MIPI_WG_34

enumerator MIPI_WG_35

enumerator MIPI_WG_36

enumerator MIPI_WG_37

enumerator MIPI_WG_38

enumerator MIPI_WG_39

enumerator MIPI_WG_3A

enumerator MIPI_WG_3B

enumerator MIPI_WG_3C

enumerator MIPI_WG_3D

enumerator MIPI_WG_3E

enumerator MIPI_WG_3F

enumerator MIPI_WG_40

enumerator MIPI_WG_41

enumerator MIPI_WG_42

enumerator MIPI_WG_43

enumerator MIPI_WG_44

enumerator MIPI_WG_45

enumerator MIPI_WG_46

enumerator MIPI_WG_47

enumerator MIPI_WG_48

enumerator MIPI_CAM_49: 0x49 – 0x4C - MIPI Camera WG Reserved – Broadcast CCCs

enumerator MIPI_CAM_4A

enumerator MIPI_CAM_4B

enumerator MIPI_CAM_4C

enumerator MIPI_RS_4D: 0x4D – 0x57 - MIPI Reserved – Broadcast CCCs

enumerator MIPI_RS_4E

enumerator MIPI_RS_4F

enumerator MIPI_RS_50

enumerator MIPI_RS_51

enumerator MIPI_RS_52

enumerator MIPI_RS_53

enumerator MIPI_RS_54

enumerator MIPI_RS_55

enumerator MIPI_RS_56

enumerator MIPI_RS_57

enumerator MIPI_DWG_58: 0x58 – 0x5B - MIPI Debug WG Reserved – Broadcast CCCs

enumerator MIPI_DWG_59

enumerator MIPI_DWG_5A

enumerator MIPI_DWG_5B

enumerator MIPIRIOWG5C: 0x5C – 0x60 - MIPI RIO WG Reserved – Broadcast CCCs

enumerator MIPIRIOWG5D

enumerator MIPIRIOWG5E

enumerator MIPIRIOWG5F

enumerator MIPIRIOWG60

enumerator B_VENCCC_61: 0x61 – 0x7F - Vendor / Standards Extension – Broadcast CCCs

enumerator B_VENCCC_62

enumerator B_VENCCC_63

enumerator B_VENCCC_64

enumerator B_VENCCC_65

enumerator B_VENCCC_66

enumerator B_VENCCC_67

enumerator B_VENCCC_68

enumerator B_VENCCC_69

enumerator B_VENCCC_6A

enumerator B_VENCCC_6B

enumerator B_VENCCC_6C

enumerator B_VENCCC_6D

enumerator B_VENCCC_6E

enumerator B_VENCCC_6F

enumerator B_VENCCC_70

enumerator B_VENCCC_71

enumerator B_VENCCC_72

enumerator B_VENCCC_73

enumerator B_VENCCC_74

enumerator B_VENCCC_75

enumerator B_VENCCC_76

enumerator B_VENCCC_77

enumerator B_VENCCC_78

enumerator B_VENCCC_79

enumerator B_VENCCC_7A

enumerator B_VENCCC_7B

enumerator B_VENCCC_7C

enumerator B_VENCCC_7D

enumerator B_VENCCC_7E

enumerator B_VENCCC_7F

enumerator D_ENEC: Direct ENEC: Enable events on a specific target.

enumerator D_DISEC: Direct DISEC: Disable events on a specific target.

enumerator D_ENTAS0: Direct ENTAS0: Enter Activity State 0.

enumerator D_ENTAS1: Direct ENTAS1: Enter Activity State 1.

enumerator D_ENTAS2: Direct ENTAS2: Enter Activity State 2.

enumerator D_ENTAS3: Direct ENTAS3: Enter Activity State 3.

enumerator D_RSTDAA: 0x86 - DEPRECATED: RSTDAA Direct. Reset Dynamic Address Assignment

enumerator D_SETDASA: Direct SETDASA: Set dynamic address from static address.

enumerator D_SETNEWDA: Direct SETNEWDA: Set a new dynamic address.

enumerator D_SETMWL: Direct SETMWL: Set Maximum Write Length.

enumerator D_SETMRL: Direct SETMRL: Set Maximum Read Length.

enumerator D_GETMWL: Direct GETMWL: Get Maximum Write Length.

enumerator D_GETMRL: Direct GETMRL: Get Maximum Read Length.

enumerator D_GETPID: Direct GETPID: Get Provisioned ID.

enumerator D_GETBCR: Direct GETBCR: Get Bus Characteristics Register.

enumerator D_GETDCR: Direct GETDCR: Get Device Characteristics Register.

enumerator D_GETSTATUS: Direct GETSTATUS: Get target status.

enumerator D_GETACCCR: Direct GETACCCR: Get Accept Controller Role.

enumerator D_ENDXFER: Direct ENDXFER: End an ongoing transfer.

enumerator D_SETBRGTGT: Direct SETBRGTGT: Set bridge target parameters.

enumerator D_GETMXDS: Direct GETMXDS: Get maximum data speed settings.

enumerator D_GETCAPS: Direct GETCAPS: Get optional feature capabilities.

enumerator D_SETROUTE: Direct SETROUTE: Configure routing information.

enumerator D_D2DXFER: Direct D2DXFER: Device-to-device tunneling control (not in I3C Basic).

enumerator D_SETXTIME: Direct SETXTIME: Set exchange timing information.

enumerator D_GETXTIME: Direct GETXTIME: Get exchange timing information.

enumerator D_RSTACT: Direct RSTACT: Configure target reset action.

enumerator D_SETGRPA: Direct SETGRPA: Set target group address assignment.

enumerator D_RSTGRPA: Direct RSTGRPA: Reset target group address assignment.

enumerator D_MLANE: Direct MLANE: Configure multi-lane operation.

enumerator MIPI_WG_9E: 0x9E – 0xBF - MIPI I3C WG Reserved – Direct CCCs

enumerator MIPI_WG_9F

enumerator MIPI_WG_A0

enumerator MIPI_WG_A1

enumerator MIPI_WG_A2

enumerator MIPI_WG_A3

enumerator MIPI_WG_A4

enumerator MIPI_WG_A5

enumerator MIPI_WG_A6

enumerator MIPI_WG_A7

enumerator MIPI_WG_A8

enumerator MIPI_WG_A9

enumerator MIPI_WG_AA

enumerator MIPI_WG_AB

enumerator MIPI_WG_AC

enumerator MIPI_WG_AD

enumerator MIPI_WG_AE

enumerator MIPI_WG_AF

enumerator MIPI_WG_B0

enumerator MIPI_WG_B1

enumerator MIPI_WG_B2

enumerator MIPI_WG_B3

enumerator MIPI_WG_B4

enumerator MIPI_WG_B5

enumerator MIPI_WG_B6

enumerator MIPI_WG_B7

enumerator MIPI_WG_B8

enumerator MIPI_WG_B9

enumerator MIPI_WG_BA

enumerator MIPI_WG_BB

enumerator MIPI_WG_BC

enumerator MIPI_WG_BD

enumerator MIPI_WG_BE

enumerator MIPI_WG_BF

enumerator MIPI_CAM_C0: 0xC0 – 0xC3 - MIPI Camera WG Reserved – Direct CCCs

enumerator MIPI_CAM_C1

enumerator MIPI_CAM_C2

enumerator MIPI_CAM_C3

enumerator MIPI_RS_C4: 0xC4 – 0xD6 - MIPI Reserved – Direct CCCs

enumerator MIPI_RS_C5

enumerator MIPI_RS_C6

enumerator MIPI_RS_C7

enumerator MIPI_RS_C8

enumerator MIPI_RS_C9

enumerator MIPI_RS_CA

enumerator MIPI_RS_CB

enumerator MIPI_RS_CC

enumerator MIPI_RS_CD

enumerator MIPI_RS_CE

enumerator MIPI_RS_CF

enumerator MIPI_RS_D0

enumerator MIPI_RS_D1

enumerator MIPI_RS_D2

enumerator MIPI_RS_D3

enumerator MIPI_RS_D4

enumerator MIPI_RS_D5

enumerator MIPI_RS_D6

enumerator MIPI_DWG_D7: 0xD7 – 0xDA - MIPI Debug WG Reserved – Direct CCCs

enumerator MIPI_DWG_D8

enumerator MIPI_DWG_D9

enumerator MIPI_DWG_DA

enumerator MIPIRIOWGDB: 0xDB – 0xDF - MIPI RIO WG Reserved – Direct CCCs

enumerator MIPIRIOWGDC

enumerator MIPIRIOWGDD

enumerator MIPIRIOWGDE

enumerator MIPIRIOWGDF

enumerator D_VENCCC_E0: 0xE0 – 0xFE - Vendor / Standards Extension – Direct CCCs

enumerator D_VENCCC_E1

enumerator D_VENCCC_E2

enumerator D_VENCCC_E3

enumerator D_VENCCC_E4

enumerator D_VENCCC_E5

enumerator D_VENCCC_E6

enumerator D_VENCCC_E7

enumerator D_VENCCC_E8

enumerator D_VENCCC_E9

enumerator D_VENCCC_EA

enumerator D_VENCCC_EB

enumerator D_VENCCC_EC

enumerator D_VENCCC_ED

enumerator D_VENCCC_EE

enumerator D_VENCCC_EF

enumerator D_VENCCC_F0

enumerator D_VENCCC_F1

enumerator D_VENCCC_F2

enumerator D_VENCCC_F3

enumerator D_VENCCC_F4

enumerator D_VENCCC_F5

enumerator D_VENCCC_F6

enumerator D_VENCCC_F7

enumerator D_VENCCC_F8

enumerator D_VENCCC_F9

enumerator D_VENCCC_FA

enumerator D_VENCCC_FB

enumerator D_VENCCC_FC

enumerator D_VENCCC_FD

enumerator D_VENCCC_FE

enumerator MIPI_WG_FF: 0xFF - MIPI I3C WG Reserved